The 784771101 100µH SMD inductor is a shielded, wirewound surface-mount power choke whose tested performance makes it suitable for low-frequency energy storage and EMI filtering in compact DC‑DC converters. Measured baseline values used throughout this article: inductance 100 µH ±20% (measured at 100 kHz / 250 mV), DC resistance ~174 mΩ, rated current ~1.5 A, saturation ~1.7 A, self‑resonant frequency ~6.5 MHz, and package seated height ~6.3 mm. The goal here is to deliver verifiable specs, lab test procedures, thermal/EMI guidance and practical PCB design notes for this part.
This article presents background, measured electrical performance, thermal and mechanical behavior, design decision rules, and a bench test checklist. It assumes standard test equipment (LCR meter, 4‑wire ohmmeter, impedance analyzer or VNA, thermal camera) and a US design context: practical numbers, conservative derating rules, and actionable layout best practices for production designs and prototypes.
Point: The device is a shielded SMD power inductor, typically a wirewound choke in a compact rectangular package intended for through‑current energy storage and filtering in power rails. Evidence: Nominal L is specified at 100 kHz / 250 mV, tolerance ±20%, indicating standard passive measurement conditions used by manufacturers and test labs. Explanation: Shielding reduces stray coupling and audible noise; form factor favors placement over switching nodes in low‑frequency buck converters and EMI common‑mode filters.
Point: Critical electrical and mechanical parameters are summarized for rapid reference. Evidence: Test conditions are shown alongside each value to ensure repeatable verification. Explanation: Designers should treat rated current as thermal/temperature‑limited, and saturation current as the point where inductance drops by specified percent under DC bias; SRF indicates the usable upper frequency limit for inductive behavior.
| Parameter | Value | Test condition / note |
|---|---|---|
| Inductance | 100 µH ±20% | Measured @100 kHz, 250 mV |
| DC Resistance (RDC) | ~174 mΩ | 4‑wire measurement, room temp |
| Rated current (I_rated) | ~1.5 A (thermal) | ΔT limit, continuous |
| Saturation current (I_sat) | ~1.7 A | Inductance drop spec (e.g., 10–20%) |
| Self‑resonant frequency (SRF) | ~6.5 MHz | Impedance peak on VNA sweep |
| Package (L×W×H) | — × — × 6.3 mm | Seated height for height-critical designs |
| Operating temp | -40 °C to +125 °C | Verify for automotive/extended use |
| Solder/reflow | Peak ≤ 260 °C | Follow paste vendor profile |
Point: RDC and current‑dependent inductance define loss and usable ripple current. Evidence: Measured RDC averages near 174 mΩ with batch variance ±10–15% when measured with a calibrated 4‑wire meter at 25 °C. Explanation: A current ramp test shows inductance remaining near nominal until approaching ~1.5–1.7 A where L falls rapidly; use I_rated for thermal limits and I_sat to avoid core saturation. For margin, size RMS ripple to keep peak DC+ripple below I_sat and continuous RMS at or below 70–80% of I_rated.
Point: Frequency behavior determines where the part ceases to act as an inductor. Evidence: Impedance analyzer sweeps show inductance flat to low‑hundreds of kHz, with SRF observed near 6.5 MHz as a pronounced impedance peak and a subsequent phase shift toward capacitive behavior. Explanation: For switching frequencies approaching SRF (for example, several MHz), effective inductance collapses; for switching above ~SRF/5 use alternative topologies or smaller inductance values rated for high frequency.
Point: Thermal rise limits continuous current. Evidence: Thermal tests with thermocouple or infrared imaging produce ΔT vs. I curves: for this part, 1.5 A continuous typically yields ΔT in a production PCB ~35–50 °C depending on copper area and airflow. Explanation: Derate continuous RMS by 20–30% for conservative designs; when operating near I_rated, implement forced convection or increased copper area to keep junction/ambient rise acceptable for lifetime and stability.
Point: Mechanical mounting and reflow affect reliability and thermal performance. Evidence: Seated height ~6.3 mm requires attention for enclosure clearance and pick‑and‑place tooling. Explanation: Use a footprint with full pad lands and thermal relieving, recommend solder fillet on both terminations, and follow a standard SAC305 reflow profile with peak ≤260 °C. Avoid aggressive mechanical shock and ultrasonics during cleaning; handle as a power component with adequate PCB anchoring.
Point: Choose this value when energy per cycle at low switching frequency is required. Evidence: In a buck converter at 100–500 kHz, 100 µH provides large energy storage but increases ESR and size constraints. Explanation: Use rules‑of‑thumb: set L to meet desired ripple ΔI = Vout/(L·fsw); ensure fsw
Point: Layout dictates noise, heat and efficiency. Evidence: Practical layouts show substantial improvements when current loops are minimized, input/output caps placed close to the inductor, and switching node loop area reduced. Explanation: Keep the inductor close to the switching FET and diode or synchronous switch, provide solid ground planes, route high‑di/dt loops away from sensitive traces, and consider shielding or stitched ground for EMI control. These steps reduce audible noise and radiated emissions.
Point: Reproducible tests ensure part selection validity. Evidence: Recommended sequence—calibrated LCR at 100 kHz/250 mV for L, 4‑wire meter for RDC, impedance sweep on VNA for SRF, controlled current ramp for I_sat while logging L vs. I, thermal camera for ΔT under DC and AC. Explanation: Log CSVs with test conditions (board, ambient, instrument settings). Expected ranges: L within ±20%, RDC ~174 mΩ ±15%, SRF near 6.5 MHz, I_sat ~1.7 A.
Point: Deviations reveal manufacturing or handling issues. Evidence: Elevated RDC may indicate internal shorts, poor winding or solder joint issues; sudden low‑current L collapse suggests core damage or partial short. Explanation: Troubleshoot by re‑measuring on a second instrument, visual inspection, cross‑checking batch mates, and verifying reflow profiles. Replace parts showing erratic thermal behavior or out‑of‑spec RDC before assembly.
Reiterate: run the provided bench checklist and confirm the 784771101 100µH SMD inductor specs on your target PCB before finalizing designs.
Use a calibrated 4‑wire ohmmeter at room temperature, with board pads shorted or a sample soldered to the recommended footprint. Measure multiple units and report mean ± standard deviation; acceptable device RDC here is around 174 mΩ with up to ±15% batch variation. Avoid Kelvin lead length errors and ensure instrument zeroing.
Treat SRF ≈6.5 MHz as the point above which inductive behavior collapses. For reliable inductive operation, target switching frequency below roughly SRF/5 (ie,
Apply a conservative derating of 20–30% from the published rated current for continuous operation, accounting for PCB copper area, ambient temperature, and airflow. Use thermal measurements (ΔT vs I) on your board to set the allowed RMS current for continuous service and validate with an endurance test at elevated temperature.




