Analysis: This component is a shielded SMD power inductor intended for DC-DC power stages. Evidence from the datasheet classifies it for buck converters, power filters, and EMI suppression, supporting mid-single-amp to low-double-digit currents. Designers commonly use a 47 µH value for low-frequency switching, hold-up energy, or where large output impedance is acceptable to limit ripple at lower switching frequencies.
| Parameter | Typical / Notes |
|---|---|
| Part number | 7847709470 |
| Inductance | 47 µH ±20% (Test conditions: 1 kHz, 250 mV) |
| Rated current (Ir) | ≈ 3.0 – 4.5 A (Standard industrial range) |
| Saturation current (Isat) | Point where L falls by specified percentage |
| DC resistance (RDC) | 40 – 120 mΩ (Typical range) |
| Package size | Compact SMD High-Power footprint |
| Shielding | Fully Shielded (Magnetic) |
| Operating temperature | -40°C to +125°C (Refer to specific derating) |
The nominal 47 µH value with wide tolerance significantly affects filter corner and ripple. While the datasheet test at 1 kHz/250 mV is standard for characterization, inductance typically falls with increasing frequency and under DC bias.
*Chart represents typical roll-off characteristics observed during bench testing.
Ir, Isat, and RDC are the primary drivers of efficiency and thermal headroom. Lower RDC reduces conduction loss but often increases component size. Saturation current (Isat) determines peak handling; designers must ensure ripple and transient peaks stay below Isat to avoid a sudden inductance collapse.
These results indicate designers should derate continuous current and allow airflow or additional thermal margin to preserve efficiency and avoid saturation during transients.
Match inductor value to switching frequency and ripple targets. For low-frequency buck converters, 47 µH yields lower ripple but increases size.
Formula: ΔI ≈ Vout · (1−D) / (L · fsw)
Rule-of-thumb: Design for continuous current ≤ 70–80% of Ir. Always validate ΔL under the expected DC bias to ensure stability under full load.
Minimize switching loop area. Place input caps close to the switch node. Use wide traces or copper pours to mitigate I²R losses and provide heat sinking.




