Headline metrics set expectations: 15 µH nominal inductance, 1.93 A rated current, 90 mΩ maximum DCR, operating −40 to 125 °C, unshielded drum-core SMD, ±20% tolerance. These metrics matter because they define insertion loss, thermal margin, and behavior under DC bias for power-conversion and EMI filtering. This report focuses on the 784775115 and delivers a metric-driven breakdown of in-circuit implications, test recommendations, and selection rules to place the component correctly in compact DC–DC and input filter designs.
| Field | Value |
|---|---|
| Part number | 784775115 |
| Package / mounting | SMD, surface-mount |
| Core type | Unshielded drum / ferrite |
| Inductance | 15 µH ±20% |
| Rated current | 1.93 A |
| Max DCR | 90 mΩ |
| Operating temp | −40 to 125 °C |
Insight: The listed DCR and rated current directly control I²R loss and thermal derating. Low DCR (90 mΩ) reduces resistive loss at rated current but the ±20% tolerance and unshielded core affect installed performance; use the table to cross-check vendor datasheet and sample measurements before committing to production.
| Feature | 784775115 (Current) | Standard Shielded (15µH) | Advantage |
|---|---|---|---|
| Rated Current | 1.93 A | 1.40 A | +37% Higher Density |
| DCR (Max) | 90 mΩ | 120 mΩ | 25% Lower Loss |
| Cost Factor | Low | High | Better ROI |
Point: typical applications include DC–DC converter input filters, EMI chokes, and small buck regulator output filters. Evidence: 15 µH at ~2 A suits moderate-current input filtering where space is limited. Explanation: plan board space for pick-and-place tooling and reflow clearance; allow room for copper pours for thermal spreading near the pad land patterns and provide a solder fillet on the termination ends to maintain mechanical reliability during assembly.
Hand-drawn sketch, non-precise schematic.
Integration Tip: For input EMI filtering, pair the 784775115 with two 10µF MLCC capacitors to form a Pi-filter. This configuration significantly reduces high-frequency noise spikes common in 12V-to-5V step-down designs.
Point: inductance will decrease with increasing frequency and the impedance will rise as |Z| ≈ 2πfL until core losses dominate. Evidence: expected L(f) curve shows flat L at low kHz, then gradual roll-off through MHz as core permeability drops. Explanation: measure L(f) using a standardized fixture at a defined test current (for example 100 mA AC, 0 DC bias) and log results from 100 Hz to 10 MHz; documenting the L(f) curve helps predict filter corner and insertion loss in the target board environment.
Point: saturation reduces effective inductance under DC bias; DCR governs I²R loss and temperature rise. Evidence: under DC bias approaching peak current the inductance can drop significantly—typical drum cores show 10–40% reduction near rated peaks. Explanation: identify saturation current by sweeping DC bias and plotting inductance; estimate power loss P = I²·DCR and model temperature rise using board thermal resistance; include margin for 70–80% of rated current for continuous operation to avoid excessive heating and inductance collapse.
Point: rated current is valid at a specific ambient and acceptable temp rise; derating is required at elevated ambient. Evidence: as ambient rises, allowable continuous current falls—common practice is to derate to 70–80% of rated current for continuous duty. Explanation: derive a simple derating curve: at 25 °C use rated current, at 85 °C reduce to ~75%; estimate board junction temperature by adding calculated I²R loss to local thermal impedance and verify expected lifetime against maximum core and wire insulation limits.
Point: confirm regulatory and process compatibility before volume assembly. Evidence: check for RoHS compliance, reflow thermal limits, and manufacturer qualification levels in the official datasheet. Explanation: unshielded parts may be sensitive to aggressive cleaning agents and handling; follow controlled reflow profiles, avoid excessive wash temperatures, and request solderability and thermal-cycle test data when qualification is required for automotive or harsh environments.
Point: layout drives observed EMI and efficiency. Evidence: proximity of input capacitors to the inductor reduces loop area and lowers EMI emissions. Explanation: place low-ESR input caps close to the switching node, minimize high-current loop area, use multiple vias to reduce trace inductance, and reserve clearance for heat dissipation; add common-mode or shielded elements if conducted emissions persist with the unshielded drum-core part.
Critical takeaways: 15 µH, 1.93 A, 90 mΩ DCR, −40 to 125 °C define the component’s thermal and electrical boundaries; apply conservative derating and verify L(f) and saturation behavior in your board context.
Answer: The key specs are 15 µH inductance, ±20% tolerance, 1.93 A rated current, 90 mΩ max DCR, and −40 to 125 °C temperature range. For DC–DC input filters prioritize DCR and saturation behavior.
Answer: Expect inductance reduction as DC bias approaches saturation and increased I²R loss. Apply conservative derating (70–80% continuous) to manage thermal runaway.




